METHOD OF REDUCING BIT LINE TO BIT LINE COUPLED NOISE IN A PLATED WIRE MEMORY STACK

摘要

A method of transposing and interposing the bit lines of a plated wire bit line memory stack involving coupling the like-ordered bit lines of different plated wire arrays in alternate transposed and nontransposed configurations and then forming separate groups of the transposed and the nontransposed bit lines, each group, defining an ordered bit of a plurality of multibit words.