发明名称 BIT PROCESSING METHOD FOR MICROCOMPUTER
摘要 PURPOSE:To enable to extend the range of data in bit procssing with less number of elements, by providing a decoder and a switching circuit before one input of an operation processor, in a bit processing of a microcomputer. CONSTITUTION:A input/output terminal 17 and a data storage RAM18 transmit the respective data to the 1st bus line 12 in 4-bit and applied to one input of an operational processor ALU14. An address register 19 of an RAM18 and a ROM20 transmits the content of register and instruction code to the 2nd bus line 13 in 4-bit. Two bits in 4-bit of the bus line 13 are converted into 4-bit at a decoder 15 and applied to another input of the ALU14 via a switching circuit 16. The operational processing at the ALU14 is selected at operation selection signals C1, C2 in two-bit and an inversion and non-inversion circuit 21 provided before another input to the ALU14 makes the inversion and non-inversion processing of the input data, allowing to make operational processing for the both inputs.
申请公布号 JPS5745642(A) 申请公布日期 1982.03.15
申请号 JP19800121558 申请日期 1980.09.01
申请人 SANYO DENKI KK;TOKYO SANYO DENKI KK 发明人 IKEDA OSAMU
分类号 G06F7/00;G06F7/76;G06F9/308;G06F15/78 主分类号 G06F7/00
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