| 摘要 |
PURPOSE:To use the external terminal (test terminal) of an LSI even in normal operation mode by holding a signal for setting a test mode by a holding circuit. CONSTITUTION:A signal 3 for setting a test mode is received by two stages of inverters 8 and 9 and inputted to a flip-flop circuit 10 for setting the test mode. To the flip-flop circuit 10, the output of a power-on resetting circuit 12 consisting of a load transistor Q1 and a capacitor C1 is inverted by an inverter 13 and inputted. Consequently, when the power source is put to work, a normal mode is set. To set the test mode, an voltage enough to hold the signal at a high level is applied from a terminal 1 and the flip-flop circuit 10 is inverted. Once the test mode is set, the signal 3 need not be held at the ''high'' level, so the terminal 1 is usable as a terminal on the normal operation level, thus an efficient testing circuit is obtained. |
