| 摘要 |
PURPOSE:To increase the hit rate of cash, by processing in preference the data corresponding to an address of the reading request given from a CPU when said address coincides with the contents of an address buffer circuit. CONSTITUTION:Accepting the reading request of a certain instruction from a CPU1, a cash memory control circuit 20 for operand reads the data of a memory address supplied via a line 2 out of an operand cash memory 30 and supplies it to the CPU1. In case no reading request is outputted from the CPU1, the data supplied from a main storage device 4 stored in an operand data buffer circuit 50 is stored in the memory 30. When the memory address of the operand coincides with the data stored in an address buffer circuit 40, an operand coindidence detecting circuit 60 applies a coincidence signal to the circuit 20. Thus the circuit 20 processes in preference the request of storage from the circuit 40. The process to the memory 30 is also executed to an instruction cash memory 31. |
