发明名称 |
ERZEUGUNG VON FEHLERKORREKTURPRUEFBITS UNTER BENUTZUNG VON PARITAETSBITS ZUR DURCHLAUFKONTROLLE |
摘要 |
Apparatus for and method of providing single bit error correction and double bit error detection using through checking parity bits. A coding scheme is implemented which uses through checking parity bits appended to each byte as check bits. The remaining check bits are generated such that the combination of through checking parity bits and remaining check bits together provide single bit error correction and double bit error detection. |
申请公布号 |
DE3125048(A1) |
申请公布日期 |
1982.03.11 |
申请号 |
DE19813125048 |
申请日期 |
1981.06.26 |
申请人 |
SPERRY CORP. |
发明人 |
DAVID WHITE,GARY |
分类号 |
G06F11/10;G06F12/16;(IPC1-7):H03K13/32;G11C29/00 |
主分类号 |
G06F11/10 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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