| 摘要 |
PURPOSE:To sharply reduce erroneous operations and to perform efficient operations, by performing rereading of microinstructions and leaving deliveries of signals to the next microstep pending until execution of the reread microinstruction is completed. CONSTITUTION:A parity check circuit 22 performs parity checks on microinstructions read out from a control storage section 11, and, when any parity error is detected at the circuit 22, contents kept in a rgister 14 is outputted as the addresss of storage section 11 to the reread appropriate microinstruction through an address control section 12. A retry control circuit 24, when execution of the microinstruction reread from the control section 11 is completed, outputs a signal 25 which prohibits shifting to the next microstep, based on the output address. In this way, occurrences of erroneous operations are reduced and the reliability of the control section 11 is improved. |
