发明名称 MULTIBUS PROCESSOR FOR INCREASING EXECUTION SPEED USING A PIPELINE EFFECT
摘要 <p>A computing apparatus having at least three data buses and a plurality of elementary function modules is disclosed. Each module is connected to at least one of the buses and at least one of the modules is connected to at least three of the buses. The buses each comprise a plurality of individual lines organized into groups: a group of source address lines, a group of destination address lines, and a group of data carrying lines. A control means is connected to each of the buses for directing the operation of the apparatus and the control means places source and destination addresses on the bus source address and destination address lines respectively for effectively connecting or configuring the function modules according to a selected program controlled configuration. The apparatus is useful in carrying out a plurality of machine operations during a single machine instruction cycle.</p>
申请公布号 CA1119731(A) 申请公布日期 1982.03.09
申请号 CA19780313111 申请日期 1978.10.11
申请人 DIALOG SYSTEMS, INC. 发明人 MOSHIER, STEPHEN L.
分类号 G06F9/38;G06F13/36;(IPC1-7):G06F9/30 主分类号 G06F9/38
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