| 摘要 |
PURPOSE:To realize a uniform relative error for the data of multiplication result, by delivering the outpuf of multiplication result after applying a 1/n multiplication to the output. CONSTITUTION:The output of an adder is first latched 13, and the upper bit data is supplied to a decoder 15. Then the signals having the levels according to the contents of the decoder 15 are delivered to lines l1-l4. The outputs of these lines are supplied to a decoder 16, and the signals of the prescribed levels are delivered to lines L1-L3. As a result, shift circuits 20 and 21 have the shift actions according to the signals. Thus the data delivered from a multiplying circuit 11 receives a 1/n multiplication through the circuit 21 and then stored in a latch 22 to become the output of a multiplier 10. |
