| 摘要 |
PURPOSE:To obtain an MOS type device higher in the integration level with finer elements and preventing the lowering of a gate breakdown strength and breaking of wires by steps by eliminating overhanging in shape of the gate electrode and irregularities on the surface of the elements due to the electrode. CONSTITUTION:An SiO2 film 2 and a polycrystaline Si layer 3 are laminated on an Si substrate 1 and after they are covered with an SiO2 film 4 to be a gate insulation film, ions are implanted into the layer 3 to be turned to an n<+> type layer. Then, a polycrystaline Si is stacked on the film 4 and turned to a p type layer 5 by a similar ion implantation to control the threshold voltage. A photoresist film 6 as mask is provided on a region intended to form a channel and O2 ion is implanted into the layer 3 not covered with the film 6 to form O2 implanted layers 31. Then, p ions are implanted into the layer 5 to form a p-implanted layer 51. After the layer 6 is removed, the layers 31 are changed to SiO2 layers 32 by heat treatment so that a part 3' of the layer 3 laid between the layers 32 is used for a gate electrode 7. Then, an n<+> type source region 8 and a drain region 9 are formed at both sides of a part 5' of layer 51 by diffusion. |
