| 摘要 |
PURPOSE:To increase the working efficiency of a processor, by making other processors wait temporarily only in the case of the competition caused by the requests simultaneously given from plural processors. CONSTITUTION:A circuit, which controls the connection of bus between the processors and a shared memory with the shared memory request signal given from each processor, consists of flip-flops (FF) 11a-11d that decide the priority in case the shared mamory request signals are given simultaneously from plural processors plus an RSFF20 that holds the result of decision of the priority. Based on the output of the RSFF20, a signal to connect the priority processor to the shared memory plus a signal to make the processor having other requests wait are delivered through logical circuits 14a-14d. |
