发明名称 MULTISYSTEM COMPUTER DEVICE
摘要 PURPOSE:To execute transcription swiftly and also exactly by use of a simple circuit providing a transcribing circuit on each CPU, and executing transcription by this circuit. CONSTITUTION:When a rise command of a CPU2 is inputted to a synchronization controlling circuit 4, the circuit 4 outputs instruction signals 41, 42 for making an operation mode a double system, to selectors 17, 27, 19 and 29. In this case, the circuit 4 outputs the signal 41 to a processing circuit 12, by which the circuit 12 discontinues its processing, stores a necesary data in a main memory 11, and after that, sets and FF18. By an output of this FF18, an FF28 is set, switching circuits 110, 210 connect main memories 11, 21 and registers 15, 25, also swtching circuits 111, 211 connect the main memories 11, 21 and registers 16, 26, and furthermore the registers 16, 26 are initialized. In this way, transcription is executed swiftly and also exactly by simple circuit without requirin a special program for transcription.
申请公布号 JPS5739465(A) 申请公布日期 1982.03.04
申请号 JP19800112447 申请日期 1980.08.15
申请人 NIPPON SHINGO KK 发明人 KAMOSHITA CHIYUUHEI;KIKUCHI JIYUUMEI
分类号 G06F11/16;G06F15/16;G06F15/167;G06F15/177 主分类号 G06F11/16
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