Circuit arrangement for reducing the settling time

摘要

The invention relates to a circuit arrangement for reducing the settling time of differential amplifiers connected to a photodiode and having feedback via a logarithmation diode, the differential amplifiers forming the input stage of exposure measuring and control circuits of photographic cameras. It is the aim and object of the invention to shorten the settling time of such an input stage by means of a simple circuit which prevents the unwanted temporary blocking of the feedback diode as the cause for long settling times. According to the invention, the object is achieved by the fact that the feedback current flowing via the logarithmation diode and being used for balancing is reduced compared with known input circuits. <IMAGE>