FABRICATING METHOD OF PLANER THYRISTER

摘要

The planar thyristor having increased withstand voltage characteristics can be fabricated by using the modified conventional etching patterns. The windows(3)(10) are formed on the both side of the n-type semiconductor substrate by the etching process. P-type impurity is doped on the windows(3) to form the penetrated regions(4) and is doped on the windeos(10) to form the graft base regions(11). The depth of the graft base region is deeper than that of the gate layer(16).