| 摘要 |
PURPOSE:To increase the degree of freedom of a layout in a static memory cell device having two-layer polysilicon wire by utilizing the process for forming a polysilicon wire as it is and forming an Si layer for connecting source and drain electrodes. CONSTITUTION:A field SiO2 film 12 is formed on the main surface of a p type Si substrate 11, and a gate insulating film 13 is formed on the surface of an active region surrounded by the film. Then, polysilicon is deposited on the overall surface, relatively high density phosphorus is treated to reduce the resistance, the polysilicon is then patterned, and a polysilicon gate 14 and the first layer polysilicon wire 15 are formed. Subsequently, n type impurity ions, e.g., phosphorus ions are injected in the substrate 11 to form a source layer 16 and a drain layer 17. After an SiO2 film 18 becoming an interlayer isulating film is formed on the overall surface, the layers 16 and 17 are partly exposed, and the second polysilicon is deposited on the entire surface. Eventually, relatively low density phosphorus is treated, is patterned to eliminate the unnecessary part, and a connecting Si layer 19 can be formed. |
