发明名称 MANUFACTURE OF JUNCTION TYPE FIELD-EFFECT TRANSISTOR
摘要 PURPOSE:To obtain the element having a small gate capacitance and a high mutual- conductance for the subject transistor by a method wherein a reverse conductive gate region is shallowly formed after a source and drain region has been formed, and the source and drain region contacting the gate side is removed. CONSTITUTION:For example, an N epitaxial layer 2 is grown on a P substrate 1 and after a P region 4 has been formed, apertures 7a and 7b are provided on an oxide film 3, and N type impurities are induced in the source region 8a and the drain region 8b. Then, the oxide film 3 on the surface is removed, P type impurities are induced and a P type layer 10 is formed shallower than the regions 8a and 8b. Subsequently, the regions 8a and 8b on the side section of the P region 10 are removed by etching and after a gate region 11 has been protrusively formed aparting from the source and drain region, and the surface layer is turned to an N channel JFET by performing oxidation. Through these procedures, gate capacity can be reduced and the element having high transconductance can be formed.
申请公布号 JPS5734370(A) 申请公布日期 1982.02.24
申请号 JP19800109520 申请日期 1980.08.09
申请人 HITACHI ELECTRONICS 发明人 MISAWA HIROSHI
分类号 H01L21/337;H01L29/80;H01L29/808;(IPC1-7):01L29/80 主分类号 H01L21/337
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