发明名称 DESKEN BUFFER CONTROL SYSTEM
摘要 PURPOSE:To ensure a highly efficient use of a buffer, by deciding no skew error although the tracks equivalent to the correctable ones do not exist within the buffer and when a deskew buffer of a quick track is filled with data. CONSTITUTION:If the track data is filled in a deskew buffer, a deskew buffer data reading logical circuit 9 knows this state by an output 20 of an OR circuit 7 of a data full signal 17. In case when the tracks equivalent to those that can be corrected by an error correcting circuit do not exist within a buffer 11, the tracks are decided as the dead ones by a data full track dead signal 13 and a dead track circuit 12. The corresponding data full signal 171 and a data-in signal 181 are prevented by gates 21 and 41, and the information on the dead track is excluded from the circuit 9.
申请公布号 JPS5733422(A) 申请公布日期 1982.02.23
申请号 JP19800107309 申请日期 1980.08.05
申请人 NIPPON ELECTRIC CO 发明人 HAGA TADASHI
分类号 G11B20/20;(IPC1-7):11B5/43 主分类号 G11B20/20
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