| 摘要 |
PURPOSE:To execute an operation of multiplication and division, which is low in power consumption and high in speed, by constituting a unit circuit of a C-MOS gate, constituting a division carrying circuit of an E/D type MOS gate, and reducing the number of elements and a chip area. CONSTITUTION:Binary numbers P0, P1-P7 of 8 bits are multiplied by binary numbers B0, B1-B7 of same 8 bits, binary numbers S0, S1-S15 of 16 bits, being said multiplied value are derived, or binary numbers A0, A1-A14 of 15 bits are divided by binary numbers B0, B1-B7 of 8 bits, and the quotient shown by binary numbers Q0, Q1-Q7 of 8 bits, being said divided result, and the remainder shown by binary numbers S0, S1-S15 of 16 bits are derived. These operations are selectively designated by a control signal. In this way, when a unit circuit is constituted of a CMOS gate, and a division carrying circuit is constituted of an E/D type MOS gate, a chip area is reduced, and the processing of multiplication and division, which is low in power consuption and high in speed is executed. |
