发明名称 INPUT AND OUTPUT SYSTEM
摘要 PURPOSE:To save the hardware, by making data transfer in the form that respective input and output controllers perform read/write processing to a control register group used commonly provided on an adaptor. CONSTITUTION:An adaptor 8 having an inpt/output controller starting register 9, interruption register 10 to a central processing unit 1 and one or a plurality of control register groups 11 is provided to a bus 3 correspondingly. The central processing unit 1 sets input/output controller starting information to the input/output controller starting register 9 on the adaptor 8 and an input and output controller 4 started correspondingly via the adaptor 8 reads out a channel control word on a main memory to a control register group 11 on the adaptor, sets it and executes data transfer. Thus, the data transfer is made between the data buffer areas on the main memory and it is informed to the central processing unit 1 via an interruption register on the adaptor 8 at the end of data transfer.
申请公布号 JPS5730014(A) 申请公布日期 1982.02.18
申请号 JP19800104583 申请日期 1980.07.30
申请人 FUJITSU LTD 发明人 KOARAI HIROYUKI;MAEDA SHIN
分类号 G06F9/48;G06F13/12 主分类号 G06F9/48
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