发明名称 CASH MEMORY ACCESS SYSTEM
摘要 PURPOSE:To enable a memory request at a high speed processing by giving priority to a memory request hitting a cash memory which has been executed without adding priority. CONSTITUTION:A memory request from one of two ports consisting of cash request flip-flop FFs 21 and 23 and address registers 22 and 24 is selected by a circuit consisting of a priority deciding circuit 29 and a selector 32 to obtain a cash address 32. This address 32 is used to refer to the indexes of a cash memory part 8 and when access to a main storage device 11 is necessary, the address 32 is stored in a main storage address register 36. On the basis of the result of the referring of the memory indexes, the memory part 8 outputs a hit signal when data of the memory request resides in the memory after the address 32 is set or a misshit signal when not as an index result signal 34.
申请公布号 JPS5730168(A) 申请公布日期 1982.02.18
申请号 JP19800103074 申请日期 1980.07.29
申请人 NIPPON ELECTRIC CO 发明人 KOTOU MASATOSHI
分类号 G06F12/08 主分类号 G06F12/08
代理机构 代理人
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