发明名称 LIST PROCESSOR OF REFERENCE COUNTER SYSTEM
摘要 PURPOSE:To remarkably reduce the hardware, by decreasing the bit width of a reference counter provided in accordance with each cell. CONSTITUTION:The hardware of a reference counter prepared in accordance with one to one to each cell is limited to have the bit width of p bits and the number of hardwares is stored in the maxium 2p-1. If it is required to store the number exceeding the maximum 2p-1, the display of maximum value is made to a counter corresponding to the said cell and stored in a counter table 29 in a counter table controlling circuit 20.
申请公布号 JPS5730046(A) 申请公布日期 1982.02.18
申请号 JP19800105494 申请日期 1980.07.31
申请人 FUJITSU LTD 发明人 HAYASHI HIROSHI
分类号 G06F12/00;G06F9/44;G06F9/48 主分类号 G06F12/00
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