| 摘要 |
The error-correcting device for processing data in parallel on a plurality of tracks provides two levels of correction on the basis of redundancy bits added to the transmitted data, namely bits resulting from coding in blocks of serial data on each channel by means of a shortened Fire code (200, 180), and parity bits each relating to one-half of the parallel tracks. An array of decoders delivers the data corrected on the basis of the bits resulting from the Fire code which are substituted when necessary for the data stored in a memory. When the errors in a block of one of the tracks are too long to be corrected in this manner, two parity computers associated with multiplexers permit determination of the erroneous bits. |
