发明名称 REPLACEMENT CONTROL SYSTEM OF BUFFER MEMORY
摘要 PURPOSE:To realize algorithm on FIFO basis easily by updating continuously only one bit, added to each entry of a direct memory. CONSTITUTION:When an address in a directory memory does not coincide with the high-order digit part of a request address, a request is sent to a main storage and data is registered in a buffer memory 1 to register the address of the data in a directory memory 2. At this time, the registration positions of the buffer memory 1 and directory memory 2 are determined by a replacement circuit 3, and B pieces of bits read out from the directory memory 2 are compared with each pair of two contiguous bits to determine the registration position according to whether they coincide or not.
申请公布号 JPS5730171(A) 申请公布日期 1982.02.18
申请号 JP19800103434 申请日期 1980.07.28
申请人 FUJITSU LTD 发明人 KOGA SATOSHI
分类号 G06F12/12 主分类号 G06F12/12
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