发明名称 Data tracking phase locked loop
摘要 A counter of modulus n counts the oscillations of a variable frequency oscillator whose center frequency is n-times the nominal frequency of digital data having phase variations. The occurrence of a selected value of the count may be taken as a phase corrected clock for the digital data. Differences between successive values in the counter as pulses of the digital data occur indicate shifts in phase thereof, while the modularity prevents absent data pulses from contributing to the phase error. Successive counts are captured, made available as phase error information in digital form, and used to drive a digital-to-analog converter whose output controls the variable frequency oscillator.
申请公布号 US4316152(A) 申请公布日期 1982.02.16
申请号 US19790077980 申请日期 1979.09.24
申请人 HEWLETT-PACKARD COMPANY 发明人 MEYER, GERALD L.
分类号 H03L7/06;H03L7/085;H03L7/093;H03L7/181;(IPC1-7):H03L7/08 主分类号 H03L7/06
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