发明名称 MULTIPLEX DATA SPEED DIGITAL SWITCH
摘要 A multiple data rate digital switch for a TDMA communications controller is disclosed which can service a plurality of input/output ports having many different data rates on a time divided basis, either between ports connected to the same controller or between ports connected to different, geographically remote controllers. A transmit burst buffer and a receive burst buffer are connected between the local ports and a TDMA communication link and an intranodal buffer is connected between local ports. All three buffers are accessed by a switch control memory which stores ni control words for each of the ports which are scanned m times per TDMA frame, there being a frame rate of f frames per second. Thus, the ports are selected and their data is buffered at a rate Ri which is equal to the product of ni times m times f. In this manner, ports having a variety of data rates can be serviced on a time interleaved basis with maximum connectivity.
申请公布号 JPS5726943(A) 申请公布日期 1982.02.13
申请号 JP19810045710 申请日期 1981.03.30
申请人 IBM 发明人 JIYOSEFU ANSONII ARUBUARIZU SA;JIYON FURANSHISU BURENAN;ROBAATO UIRIAMU KURUUGU
分类号 H04J3/00;H04B7/15;H04B7/212;H04J3/16;H04Q3/52;H04Q11/04 主分类号 H04J3/00
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