发明名称 REFRESH CONTROLLER
摘要 PURPOSE:To make small the shape of batteries and the current capacity, by providing a refersh adress register and control circuit to a storage device and always enabling memory refresh through battery backup of the storage device only. CONSTITUTION:A storage device 13 having a memory 28 of DRAM constitution is refresh address register 22 where row or column address of an address information ADRS is loaded from a processor 11, while the power supply can be applied from the AC power supply application. After the power supply is possible to be applied, the content of the register 22 is counted and renewed based on a refresh request REF 1 from a refresh control circuit 12 at a control circuit 23 and the result is outputted to a memory 28 as the refresh address. During the interruption of supply of AC power, the device 13 is backed up with a battery 16 and the register 22 is counted and renewed with the refresh request signal made at the control circuit 23 and outputted to the memory 28.
申请公布号 JPS5727491(A) 申请公布日期 1982.02.13
申请号 JP19800101540 申请日期 1980.07.24
申请人 TOKYO SHIBAURA ELECTRIC CO 发明人 WATANABE CHIYUUJI
分类号 G06F12/16;G11C11/401;G11C11/406 主分类号 G06F12/16
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