| 摘要 |
PURPOSE:To facilitate control by preventing access requests from colliding with each other in a bank while employing multiplebank constitution for vector registers. CONSTITUTION:Vector registers are composed of banks B0-B7. Respective elements #0, #1-#8. of the vector registers VR0, VR1-VR8 are stored in the banks B0, B1-B8. Similarly, elements are assigned to the banks, and readout vector data are synchronized by a buffer register 5, thereby inputting the element #i of the vector register VR0, and the element #i of the vector register VR1 to an operator 9 at the same time. |
