发明名称 FRAME SYNCHRONIZING SYSTEM
摘要 PURPOSE:To enable the restoration of synchronism in a short time without missing a true frame pattern, by comparing an inputted frame pattern with a pattern of a set circuit while changing either one of the patterns is changed for the time sequence. CONSTITUTION:A frame pattern inserted in a data signal in a given period is stored in a shift register SR and it is collated with an output pattern of a frame pattern set circuit FPS at a collation circuit CLT. If the two are not coincided, the time sequence of either one of signal train of the frame and output patterns is changed for collation again. This is repeated by (one frame bit number -1) times until the both are coincided. When the two coincide, a flip-flop FF is set and a synchronizing protection circuit SH is operated.
申请公布号 JPS5726946(A) 申请公布日期 1982.02.13
申请号 JP19800101575 申请日期 1980.07.24
申请人 FUJITSU LTD;NIPPON TELEGRAPH & TELEPHONE 发明人 AKAO TAKASHI;TOMITA SHIYUUJI;TOGAWA TAKASHI
分类号 H04L7/08;H04J3/06 主分类号 H04L7/08
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