发明名称 BUFFER MEMORY
摘要 PURPOSE:To increase the bit rate of a buffer memory and reduce the access competition to a main storage device, by securing a long time residence of the data having a high using number of times in a buffer memory. CONSTITUTION:A real address register 13 stores the addresses including a set address 22 that gives an access to a buffer 11 having columns 0-3. In addition to the register 13, the following units are provided: a memory 15 that stores the LRU bit to replace the storage contents of the memory 11; an address register 16 to the memory 15; a separate register 18 that shows the non-use state of the culumns of the memory 11; a residence register 19 that displays the resident column with no registered data used for a subject of replacement; a register 12 that stores a buffer memory request having a residence indication bit 14; and a replacing circuit 17. In case no desired data exists in the memory 11 to the access of ''1'' for the bit 14, the data read out of a main storage device is allotted with priority to the residence column.
申请公布号 JPS5724084(A) 申请公布日期 1982.02.08
申请号 JP19800097728 申请日期 1980.07.17
申请人 NIPPON ELECTRIC CO 发明人 NISHIMURA HIDEKI
分类号 G06F12/12;G06F12/08 主分类号 G06F12/12
代理机构 代理人
主权项
地址