| 摘要 |
<p>PURPOSE:To utilize a reset-signal input terminal effectively by outputting a reset signal from the input terminal. CONSTITUTION:When a power source is turned on, a rising power voltage VDD does not depend upon an RST signal (a) in a voltage unstable resin, and a CPU is set to an initial value through the operation of its internal voltage detecting circuit. When the RST signal (a) is outputted from an RST terminal 2 as a pulse having an active level, an RST output control signal (c) is outputted on the execution of an output instruction for the RST signal (a). A transistor (TR) 8 is normally off and the RST terminal 2 is therefore pulled up to a high level by a pull-up resistance 7. When a pulse with an active level (High) is outputted as the RST output control signal (c), the TR8 is turned on to output the pulse with an active level (LOW) from the RST terminal 2.</p> |
