发明名称
摘要 A method and apparatus is disclosed in which reversible cyclic encoding is used to enable reverse error identification. Encoding and decoding is performed in essentially a conventional manner, except that the coding conforms to a reversible cyclic generator polynomial. In the preferred embodiment, a linear feedback shift register is augmented with logic gates which enables the reversing of syndrome bits for subsequent error identification cycling in the event an error is detected.
申请公布号 JPS576618(B2) 申请公布日期 1982.02.05
申请号 JP19740059263 申请日期 1974.05.25
申请人 发明人
分类号 H03M13/00;G06F7/00;G06F7/76;G06F11/10;H03M13/17 主分类号 H03M13/00
代理机构 代理人
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