Integrated circuit astable trigger stage - has two parallel sets of leakage compensating IGFETs in gate circuit of supply transistor

摘要

The integrated circuit for an astable trigger circuit with a frequency independent of manufacturing leakages includes an insulated gate-FET (TD10) in series with parallel sets of IG-FET's (TD11,TD12) across the supply connections (UDD,USS). They are connected to the gate electrode of the supply transistor (Td7). The two sets of transistors (TD11,12) compensate for channel width faults and also fluctuations of the supply transistor. This transistor operates to charge the two capacitors (C1,C2) of the cross coupled enhancement transistors (TE2,4) for the astable trigger stage. These have load resistances formed by depletion transistors (TD1,3) with short circuit source/gate paths.