发明名称 SIGNAL PROCESS ARITHMETIC PROCESSOR
摘要 <p>PURPOSE:To ensure a free chaining for a channel command, by setting the channel command that indicates the execution of a fundamental operation for a signal process operation. CONSTITUTION:A signal process arithmetic processor 34 consists of a channel interface part 35, a microprogram control part 38, an arithmetic data address generating part 40, an arithmetic part 41, a triangle functiontable memory 42, an arithmetic local memory 43, a bus connecting part 44 and an internal bus 45. The operation is controlled by a microprogram control system. The control signal is supplied to each part via a control line 46, and the data is transferred via an internal bus 45 (BUS).</p>
申请公布号 JPS5720862(A) 申请公布日期 1982.02.03
申请号 JP19800093997 申请日期 1980.07.11
申请人 OKI ELECTRIC IND CO LTD 发明人 FUKUDA SHIYUUZOU;OOTSUKA TAKESHI;SHINOZAKI HIROSHI;ONOKI HIROYUKI
分类号 G06F9/22;G06F9/38;G06F15/16;G06F17/10;G06F17/14;G06F17/15;G06F17/18 主分类号 G06F9/22
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