发明名称 DATA PROTECTING SYSTEM
摘要 PURPOSE:To greatly simplify not only the constitution of circuit but a power source, by retaining the start of execution for a new instruction of a microprocessor with the output of a power source fault detecting circuit and discontinuing the execution of instruction with the output of a delaying circuit. CONSTITUTION:The DC output of a power source 1 is applied to a power source fault detecting circuit 2 through a signal line 4. A voltage fault signal of a high level is delivered to a signal line 5 when the DC output of the source 1 is lower than a prescribed level. This fault signal is applied to the HOLD input of a microprocessor MPU7 as well as to a delaying circuit 3, and the output signal is applied to the input RESET-IN of the MPU7 through a signal line 6. When the voltage fault signal is delivered, the MPU7 finishes the execution of an instruction under execution at that moment to secure a waiting mode. Then the MPU7 stops immediately the execution of instruction after a time that is decided by a capacitor 10 and a resistance 9 of the circuit 3.
申请公布号 JPS5720845(A) 申请公布日期 1982.02.03
申请号 JP19800096443 申请日期 1980.07.15
申请人 HITACHI LTD 发明人 KANEKO TOORU;HIRAMITSU YUUJI
分类号 G06F1/30;G06F1/28;G06F11/00 主分类号 G06F1/30
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