| 摘要 |
PURPOSE:To ensure a high-speed process for a conditional branch instruction or an arithmetic instruction, by providing an area where the result of comparison with other data is stored to one or plural registers in addition to the area where the original data is stored. CONSTITUTION:Each register of a register group 7 consists of an area 8b to store a data D and an area 8a to store the result of comparison between data D and C. The data D supplied through a singal line 3 is stored in the area 8b where the data of one of the registers of the group 7 and at the same time compared with the data C supplied through a signal 4 at a comparator 5. The result of this comparison is stored in the area 8a. |
