| 摘要 |
PURPOSE:To redouble the number of inputs per operation, by controlling the timing of production according to the number of inputs for the reset signal of a register that stores the total sum of the microincrements of the input signals of >=2 interlations. CONSTITUTION:A computer 201 transmits the initial value to a Y memory 203 which stores the result of operation of equation (1), an R memory 204 which stores the result of operation of equation (2) and an increment memory 205 which stores an overflow component DELTAZ1 of the operation of equation (2) respectively via a common bus 202 plus multiplexer 2021, 2022 and 2023, and at the same time transmits an arithmetic control instruction of DDA to a control memory 206. The computer 201 also transmits the desired value of a program counter 207 that designates the address of the memory 206 and furthermore starts and stops a controller 208 which produces a series of timing signals necessary for execution of an operation of DDA. |
