发明名称 MASS STORAGE ACCESS SYSTEM
摘要 PURPOSE:To realize a control of the input/output process in accordance with the load of a processor, by securing the exeuction of the instruction stored in a stack means in case the number of the input/output instructions produced in a certain time does not reach a certain value. CONSTITUTION:An input/output request, if produced, is once stored in a stacker 11 in a stack means 1, and the number of the stored input/output requsts is informed to a counter 12. When the value of the counter 12 reaches a certain number of more, an instruction transmission signal is put into an OR circuit 31. Then the stored input/output requests are sent en bloc to an input/output process means 3. On the other hand, the occurrence of request is informed to a counter 22 in a request control means 2 to be counted with each application of the input/output request to the stacker 11. A timer 21 transmits a period signal to a comparator 23 every certain time. Based on this signal, the value of the counter 22 is compared with a certain value. If the value of the counter 22 is smaller than a certain value, the transmission signal of the stacked input/output request is transmitted to the ciruit 31.
申请公布号 JPS5720853(A) 申请公布日期 1982.02.03
申请号 JP19800096080 申请日期 1980.07.14
申请人 FUJITSU LTD 发明人 FUJIMOTO GENICHI
分类号 G06F13/10;G06F3/06;G06F15/177 主分类号 G06F13/10
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