| 摘要 |
PURPOSE:To store the unit picture of a plurality of frames, by storing the storage picture of each frame surely at the address location in time matching, in the state that the input video signal is surely synchronized to the vertical synchronizing signal. CONSTITUTION:An input picture signal is applied to a synchronizing separation circuit 11, and a vertical synchronizing signal is separated and picked up. The vertical synchronizing signal in field unit obtained from the circuit 11 is frequency-divided at a 1/2 frequency division circuit 12 and applied to a fized terminal of normally close contact side of switches 13a-13e as the clock signal in frame unit. A counter 15 is initialized at the frame clock from the circuit 12 and output signal is generated in frame unit of an input video signal. This signal initializes the address counter 16 and gives a count signal to a frame counter 17, which gives a sequential selection and operation instruction to frame memories 20a-20c. The address information from the counter 16 is given in parallel to the memories 20a-20c and written in a write-in signal generating circuit 21. |
