发明名称 PSEUDO FAULT GENERATING SYSTEM
摘要 PURPOSE:To realize a pseudo fault generation test using a maintenance test program by means of a simple additional circuit even in case just one centralized control type storage device is used. CONSTITUTION:The information given from a specific memory module designating means 30 which is provided outside a common control logic part 21 and gives an indication to a specific module to produce a pseudo fault plus a memory module designating address which is added in the case of an access of memory are given to an address coincidence deciding circuit 39. Based on the result of decision of the circuit 39, an access is given to the memory module indicated by the means 30. In this case, a pseudo fault is produced. No pseudo fault is produced in case an access is given to the memory module to which no indication is given by the means 30.
申请公布号 JPS5720850(A) 申请公布日期 1982.02.03
申请号 JP19800096348 申请日期 1980.07.15
申请人 NIPPON TELEGRAPH & TELEPHONE;NIPPON ELECTRIC CO;FUJITSU LTD 发明人 KANEDA SHIGEO;SATOU TOSHIHIKO;TANIGUCHI SHIYOUZOU
分类号 G06F11/22 主分类号 G06F11/22
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