发明名称 LOGICAL GATE CIRCUIT
摘要 PURPOSE:To improve switching speed of a circuit by providing buffer circuits between the collector of the level shift transistor (TR) of a TTL and that of a phase- division stage transistor, and a power source. CONSTITUTION:When a voltage VI is applied to one of input terminals 1 and a 1-level input voltage is applied to the other input terminal, a level lshift transistor TRQ1, a phase-division stage TRQ2, and an output TRQ3 turn on and an output at a terminal 3 shows a level 0. As the voltage VI drops, the TRs Q1-Q4 turn off. At this time, if the rise of the collector voltage of the TRQ2 lags that of the TRQ1 and a difference between the both increases, a TRQ7 and a Schottky barrier diode SBDD2 turn on to charge the collector capacity of the TRQ2 forcibly. Consequently, the collector potential of the TRQ2 rises rapidly to shorten the turn-off time of the circuit.
申请公布号 JPS5720027(A) 申请公布日期 1982.02.02
申请号 JP19800086312 申请日期 1980.06.25
申请人 NIPPON ELECTRIC CO 发明人 MORI SUSUMU
分类号 H03K19/013;H03K17/04;H03K19/088 主分类号 H03K19/013
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