发明名称 SYNTHESIZER RECEIVER
摘要 PURPOSE:To eliminate a displeasing tone generated when a reference frequency is set, by operating a squelch circuit for a prescribed time by detecting a tuning pulse after the operation of tuning-speed changeover switch. CONSTITUTION:A tuning-speed changeover switch S is chaged over to differentiate the outputs of inverters 21 and 22 at 23 and 24, whose differential outputs are applied in the form of the sum to the set terminal S of an FF27. Consequently, the terminal Q' of the FF27 is set low. When a tunig pulse is supplied to an input terminal 13, on the other hand, the terminal Q' of an FF25 changes to a low level. Therefore, the output of an OR gate 28 is low during the said period to discharge a capacitor C4, and an output terminal 14 is made high, so that the signal of the terminal 14 decreases the response gain of a low-frequency amplifier to input frequency characteristics. When the terminal Q' of the FF27 returns to the high level, a diode D3 turns off and the terminal 14 is made low a prescribed time later to release the amplifier from the squelch operation. As the terminal Q' of the FF25 change to the high level, the FF27 is reset and the terminal Q' is held at the high level without reference to an input.
申请公布号 JPS5720035(A) 申请公布日期 1982.02.02
申请号 JP19800095389 申请日期 1980.07.11
申请人 MATSUSHITA ELECTRIC IND CO LTD 发明人 MIYANAGA KATSUHIKO
分类号 H04B1/26;H03G3/34;H04B1/10 主分类号 H04B1/26
代理机构 代理人
主权项
地址