发明名称 |
Method of fabricating a charge transfer channel covered by a stepped insulating layer |
摘要 |
The disclosed memory cell is comprised of a charge storage region and an adjacent charge transfer channel. A deep dopant layer extends throughout the charge storage region, and a shallow dopant layer extends throughout the charge storage region plus part-way through the charge transfer channel. Overlying the charge storage region is a first conductor that is completely covered by a thick insulating layer. This thick insulating layer also extends into the charge transfer channel part-way over the shallow dopant layer. A thin insulating layer covers the remaining portion of the channel. Lying on this thin insulating layer and extending onto the thick insulating layer is a second conductor. Parasitic capacitance and catastrophic shorts between the two conductors are minimized by the thick insulating layer; charge storage capacity of the storage region is maximized by the two dopant layers lying therein; and cell length is minimized by the thick insulating layer and underlying shallow dopant layer in the charge transfer channel.
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申请公布号 |
US4313253(A) |
申请公布日期 |
1982.02.02 |
申请号 |
US19800113388 |
申请日期 |
1980.01.18 |
申请人 |
BURROUGHS CORPORATION |
发明人 |
HENDERSON, SR., DONALD L. |
分类号 |
H01L21/8242;H01L27/108;(IPC1-7):H01L21/22;H01L21/26 |
主分类号 |
H01L21/8242 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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