| 摘要 |
PURPOSE:To generate a reset signal which is long enough without increasing a chip size and consumption current, by means of constitution of only providing an inverter gate for reducing a charge current of capacity by shunt. CONSTITUTION:The second collector of an inverter gate G1 is connected to an input of an inverter gate G3, and the first collector is connected to an output terminal OUT. When an electric power supply has been put to work, a charge current Ic flows, and voltage V1 of a capacity C rises. Up to a threshold level Vth, the first collector voltage V0 of G1 is ''H'', G3 makes Ic' flow, and Ic is Ij-Ic'. When it reaches Vth at time t1 and G1 is turned on, G3 is turned off, and Ic' becomes ''0''. In case when hFE of G3 is large enough, Ic' becomes Ij/N, a reset time t0-t1 is CXVth/(1- N<-1>) Ij, and N suitably selects a pattern area ratio of 2 outputs of G3 and is able to decide it to an optional value. According to such a constitution, a long reset time is obtained without increasing a chip size and current consumption. |
