发明名称 SYNCHRONOUS BINARY COUNTER UTILIZING A PIPELINE TOGGLE SIGNAL PROPAGATION TECHNIQUE
摘要 <p>A synchronous binary counter includes a plurality of counter stages wherein each stage experiences a state change in response to the application of a toggle signal thereto, Gating apparatus is provided between successive ones of the counter stages and said gating apparatus is responsive to a first state of the preceding counter stage for transferring the toggle signal to successive ones of the counter stages and responsive to a second state of the preceding counter stage for blocking the transfer of the toggle signal. The apparatus grounds a toggle signal input to each counter stage in response to a clock signal being applied.</p>
申请公布号 CA1117191(A) 申请公布日期 1982.01.26
申请号 CA19780315926 申请日期 1978.11.07
申请人 STANDARD MICROSYSTEMS CORPORATION 发明人 POPPER, JAY
分类号 H03K23/52;H03K21/16;H03K23/00;H03K23/40;H03K23/42;(IPC1-7):H03K23/00 主分类号 H03K23/52
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