| 摘要 |
PURPOSE:To simply remove the inherent glitch produced by a D/A converter itself, by connecting a sample holding circuit to the post stage of the D/A converter. CONSTITUTION:A time-division amplitude quantizing signal inputted to an input terminal 1 is converted into an analog signal with a D/A converter 2. The output of the converter 2 is amplified at an operational amplifier 3 and applied to a sample holding circuit 6. A sample trigger from a sample trigger input 5 in synchronizing with time-division amplitude quantizing signal inputs 1a-1h is applied to the circuit 6. With the sample trigger, the circuit 6 avoids the glitch produced by the converter 2 in timing for sample holding. Thus, the inherent glitch produced by the converter 2 can be eliminated. |
