发明名称 MEMORY CONTROL SYSTEM
摘要 PURPOSE:To get rid of an access time, and to prevent a decline of a processing functon, by converting a data to a memory address which has been designated by a program, and accessing it to a memory device which is different in an instruction and a data, in a data processing equipment of an advance control system. CONSTITUTION:When an instruction is read out, and a data is read out and written, an instruction read-out controlling circuit 1 and a data read-out and write controlling circuit 2 are operated, and output an access request to a memory request receiving circuit 4. Also, it is sent to an address converting circuit 5, too, and the request is discriminated by a receiving signal from the receiving circuit 4. On the other hand, a memory device address is sent to the converting circuit 5 from a memory address preparing circuit 3, the converting circuit 5 converts the memory device address in accordance with a discriminated request of the controlling circuit 1, 2, it is sent to a memory device enable preparing circuit 6, is decoded to enable signals EN0-ENn, and is sent to the memory device separately. Also, an address in the memory device is address-converted, too, in accordance with a request, and is sent to the memory address as it is.
申请公布号 JPS5713550(A) 申请公布日期 1982.01.23
申请号 JP19800086600 申请日期 1980.06.27
申请人 HITACHI LTD 发明人 YASUI ISAMU
分类号 G06F9/38;G06F12/00;G06F12/06 主分类号 G06F9/38
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