| 摘要 |
PURPOSE:To reduce the propagation signal delay of a semiconductor memory device having a memory cell mode of one transistor and one capacitor by forming a transfer gate electrode and a partial wire of a bit wire of impurity-containing high melting point metallic silicide. CONSTITUTION:An Mo silicide film 4 is selectively formed on a p type Si substrate 1 having a field oxidized film 2 and a gate oxidized film 3 as a capacitor electrode. The film 3 is patterned to expose a part 3A of the surface of the substrate, and the overall surface is formed with a thermally oxidized film 5. The film 5 on the region to be formed with a bit wire is removed, and a phosphorus-containing Mo silicide film of doner impurity is formed. The Mo film is patterned, and a transfer gate electrode 6G and a bit wire 6B are formed. Arsenic is injected to form an n<+> type active region 7. Thus, the resistance value of the bit wire is reduced to reduce the propagation signal delay. |
