| 摘要 |
PURPOSE:To achieve a semiconductor device generating clocks of an arbitrary period, by using two transistors (TRs) and two capacitors and changing the combination of the capacitors. CONSTITUTION:When a clock phiCP' changes from ''L'' to ''H'' at time t1, a node N1 is lifted to ''H'' with a capacitive coupling of CT of a capacitor 1. Thus, a Q2 turns on and the level of the N1 is increased. Next, when the phicp' changes from ''H'' to ''L'' at time t2, the level of N1 is made negative with the capacitance coupling by the CT of the capacitor 1. Thus, the Q1 turns on and the level of N1 returns to the threshold voltage -VTH of the Q1. The same cycles are repeated and the level of N2 is gradually increased, and when this exceeds the threshold voltage VTH of the Q3, the Q3 turns on and the circuit is operated. Through the operation of the circuit 8, a Q4 turns on and the potential of N2 returns to ground. Thereafter, the same cycles are repeated. Thus, by selecting the capacitance of the capacitors 1,4 suitably, a clock generator having an arbitrary period can be achieved. |
