发明名称 Parallel generation of serial cyclic redundancy check
摘要 A method and apparatus for assuring the accuracy of data received by any device in a computer system from any other device in the same computer system or from another computer system. The existing hardware of a computer system is utilized to generate a cyclic redundant check character each time a unit of data is transmitted. The cyclic redundant check character is concatenated to the right of such data transmitted. Each time that the particular data is received, the check character and the data with which it is associated, is again manipulated in the same manner as in generating the check character. If the data received is the same as the data transmitted, the result of such manipulation is zero.
申请公布号 US4312068(A) 申请公布日期 1982.01.19
申请号 US19780884465 申请日期 1978.03.07
申请人 HONEYWELL INFORMATION SYSTEMS INC. 发明人 GOSS, GARY J.;MILLER, ROBERT C.
分类号 H03M13/09;(IPC1-7):G06F11/10 主分类号 H03M13/09
代理机构 代理人
主权项
地址