| 摘要 |
PURPOSE:To vary resolution and a conversion time and to realize that by a monolithic IC by varying the clock of a delay line of relative simple circuit constitution which uses a charge transfer element. CONSTITUTION:An analog signal Vin is inputted to a terminal 7 of a comparator 1 and compared with a reference voltage Vc generated at a terminal 8 by a lamp generator 2 to obtain an output VG1 at a terminal 9. The VG1 is inputted to the 1st delay line 4, whose output is inputted to a terminal 14 as the stop signal V01 of a counter 6. Further, a voltage VG2 generated at a terminal 10 by a pulse generator 3 is inputted to the 2nd delay line 5, whose output pulse train is counted by the counter 6 until the stop signal V01 is inputted to its terminal 14. Namely, a counted value proportional to the input analog signal Vin is obtained by counting pulses appearing at the output of the 2nd delay line 5 until the voltage of the lamp generator becomes equal to the input analog signal Vin, so that A/D conversion becomes possible.
|
