发明名称 OUTPUT CIRCUIT
摘要 PURPOSE:To prevent effectively the malfunction or the like of a circuit and to reduce the power consumption due to a through current by preventing the variance or the like of the earth level due to the through current. CONSTITUTION:The circuit is so controlled that one of two pairs of PMOS transistors TRs T1 and T3 and NMOS TR T2 and T4 are operated when an output level 0 rises from a time t1 to a time t2 or falls from a time tau1 to a time tau2. Consequently, the supplied current is controlled and the output level 0 has a smooth rise or fall characteristic. The other pair of PMOS or NMOS TRs are turned off then. Thus, the evil of flow of the through current is prevented.
申请公布号 JPS62193316(A) 申请公布日期 1987.08.25
申请号 JP19860032849 申请日期 1986.02.19
申请人 SONY CORP 发明人 MATSUMOTO TADASHI
分类号 H03K19/0948;H03K4/00;H03K4/02;H03K17/687;H03K19/094 主分类号 H03K19/0948
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